The present invention relates generally to power supply systems and particularly to a power converter circuit.
A typical switching-type power converter circuit operates by storing and releasing energy in various discrete capacitive and inductive components during each cycle of operation, where the time interval for each cycle is determined by the switching frequency. An increase in switching frequency reduces the storage time interval and the level of energy stored in reactive components during any one particular cycle of operation. In principle this increase in frequency permits reduction of both the physical and electrical sizes of magnetic and capacitive storage elements for any particular power capacity.
Please refer now to FIG. 1(a). FIG. 1(a) is a high level illustration of a conventional switching-type power converter circuit 10. The circuit 10 includes an input 11, a variable frequency voltage control oscillator 14, a fixed frequency resonant circuit 15, filter components 25, an error amplifier 36, and an output 38. The voltage control oscillator 14 is coupled to the resonant circuit 15 and the error amplifier 36 wherein the error amplifier 36 is coupled to the output 38. The resonant circuit 15 is coupled to the filter components 25 wherein the filter components 25 are coupled to the output 38.
For a more detailed description of the conventional switching-type power converter circuit 10, please refer now to the FIG. 1(b). Shown in the figure are the input 11, first, second, third and fourth capacitors 12, 18, 28, 34, the voltage control oscillator 14, two switches 16, 20, first and second inductors 22, 32, a transformer 24, two diodes 26, 30, an error amplifier 36, and an output 38.
The input 11 is coupled to the first capacitor 12 and the first switch 16 wherein the first switch 16 is coupled to the voltage control oscillator 14 and the second switch 20. The voltage control oscillator 14 is also coupled to the second switch 20 and the first capacitor 12 is coupled to the transformer 24. The first and second switches 16, 20 are coupled to the second capacitor 18 wherein the second capacitor 18 is coupled to the first inductor 22. The first inductor 22 is coupled to the transformer 24 wherein the transformer 24 is coupled to the third capacitor 28. The third capacitor 28 is coupled to the first and second diodes 26, 30 wherein the first and second diodes 26, 30 are coupled to the second inductor 32. The second inductor 32 is coupled to the fourth capacitor 34 wherein the fourth capacitor 34 is coupled to the output 38. The output 38 is coupled to the error amplifier 36 wherein the error amplifier 36 is coupled to the voltage control oscillator 14.
The resonant circuit 15 comprises the first inductor 22, transformer 24 and the third capacitor 28. The filter components 25 comprise the two diodes 26, 30, the second inductor 32 and the fourth capacitor 34. The second capacitor 18 develops almost half of the DC input voltage and also prevents the transformer 24 from saturating. The first inductor 22 is a leakage inductor for the transformer 24 and the two diodes 26, 30 are used for rectifying a sine wave voltage that is developed across the third capacitor 28.
During operation, the circuit 10 operates over a wide range of load conditions wherein the output 38 of the power converter circuit 10 is a regulated output. The output 38 is regulated by allowing the error amplifier 36 to sense the output DC voltage. Because the output DC voltage has a tendency to change from its set voltage, the error amplifier 36 subsequently develops a voltage that will vary the frequency of voltage control oscillator 14. A square wave of different frequency applied across the fixed frequency resonant circuit 15 will increase or decrease the voltage developed across the fourth capacitor 34 thereby increase or decreasing the voltage at the output 38.
Because the switches 16, 20 each experience full voltage when being turned on, the circuit 10 can not operate in a zero voltage switching (ZVS) mode. Consequently, since the circuit can not operate in a ZVS mode, as the frequency increases, the switching losses incurred by the two switches 16, 20 increases. These losses become significant at frequencies of 5 megahertz or higher.
Accordingly, what is needed is an improved converter circuit. The circuit should be simple, cost effective, and easily adaptable to existing technology. The present invention addresses such a need.
A power converter circuit is disclosed. The power converter circuit comprises an oscillator for receiving an input wherein the oscillator operates with a fixed frequency and a resonant circuit coupled to the oscillator, wherein the resonant circuit is adjusted to minimize switching losses.
Through the use the power converter circuit in accordance with the present invention, high switching losses are avoided thereby resulting in an increase in the overall efficiency of the power converter circuit.